Revisão | 14629 (tree) |
---|---|
Hora | 2021-07-31 19:28:46 |
Autor | vrepetenko |
Added SYSTICKv2 initial version.
@@ -0,0 +1,156 @@ | ||
1 | +/* | |
2 | + ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio | |
3 | + | |
4 | + Licensed under the Apache License, Version 2.0 (the "License"); | |
5 | + you may not use this file except in compliance with the License. | |
6 | + You may obtain a copy of the License at | |
7 | + | |
8 | + http://www.apache.org/licenses/LICENSE-2.0 | |
9 | + | |
10 | + Unless required by applicable law or agreed to in writing, software | |
11 | + distributed under the License is distributed on an "AS IS" BASIS, | |
12 | + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |
13 | + See the License for the specific language governing permissions and | |
14 | + limitations under the License. | |
15 | +*/ | |
16 | + | |
17 | +/** | |
18 | + * @file SYSTICKv2/hal_st_lld.h | |
19 | + * @brief ST Driver subsystem low level driver code. | |
20 | + * | |
21 | + * @addtogroup ST | |
22 | + * @{ | |
23 | + */ | |
24 | + | |
25 | +#include "hal.h" | |
26 | + | |
27 | +/*===========================================================================*/ | |
28 | +/* Driver local definitions. */ | |
29 | +/*===========================================================================*/ | |
30 | + | |
31 | +#define ST_HANDLER STM32_RTC_ALARM_HANDLER | |
32 | +#define ST_NUMBER STM32_RTC_ALARM_NUMBER | |
33 | + | |
34 | +#define STM32_ST_RTC_PREDIVA (STM32_RTCCLK / OSAL_ST_FREQUENCY) | |
35 | + | |
36 | +/** | |
37 | + * Initialization for the RTC_PRER register. | |
38 | + */ | |
39 | +#define STM32_ST_RTC_PRER_BITS ((STM32_ST_RTC_PREDIVA - 1) << RTC_PRER_PREDIV_A_Pos) | |
40 | + | |
41 | +/*===========================================================================*/ | |
42 | +/* Driver exported variables. */ | |
43 | +/*===========================================================================*/ | |
44 | + | |
45 | +/*===========================================================================*/ | |
46 | +/* Driver local types. */ | |
47 | +/*===========================================================================*/ | |
48 | + | |
49 | +/*===========================================================================*/ | |
50 | +/* Driver local variables and types. */ | |
51 | +/*===========================================================================*/ | |
52 | + | |
53 | +/*===========================================================================*/ | |
54 | +/* Driver local functions. */ | |
55 | +/*===========================================================================*/ | |
56 | + | |
57 | +/*===========================================================================*/ | |
58 | +/* Driver interrupt handlers. */ | |
59 | +/*===========================================================================*/ | |
60 | + | |
61 | +#if !defined(STM32_SYSTICK_SUPPRESS_ISR) | |
62 | +/** | |
63 | + * @brief Interrupt handler. | |
64 | + * | |
65 | + * @isr | |
66 | + */ | |
67 | +OSAL_IRQ_HANDLER(ST_HANDLER) { | |
68 | + | |
69 | + OSAL_IRQ_PROLOGUE(); | |
70 | + | |
71 | + st_lld_serve_interrupt(); | |
72 | + | |
73 | + OSAL_IRQ_EPILOGUE(); | |
74 | +} | |
75 | +#endif | |
76 | + | |
77 | +/*===========================================================================*/ | |
78 | +/* Driver exported functions. */ | |
79 | +/*===========================================================================*/ | |
80 | + | |
81 | +/** | |
82 | + * @brief Low level ST driver initialization. | |
83 | + * | |
84 | + * @notapi | |
85 | + */ | |
86 | +void st_lld_init(void) { | |
87 | + | |
88 | + /* Enabling the stop mode during debug for RTC.*/ | |
89 | + DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_RTC_STOP; | |
90 | + | |
91 | + /* Enable RTC kernel clock.*/ | |
92 | + RCC->BDCR |= RCC_BDCR_RTCEN; | |
93 | + | |
94 | + /* Enable RTC APB bus clock.*/ | |
95 | + rccEnableAPB1R1(RCC_APB1ENR1_RTCAPBEN, true); | |
96 | + | |
97 | + /* Disable RTC write protection.*/ | |
98 | + RTC->WPR = 0xCA; | |
99 | + RTC->WPR = 0x53; | |
100 | + | |
101 | + /* Disable all alarms and interrupts.*/ | |
102 | + RTC->CR &= ~(RTC_CR_ALRAIE | RTC_CR_ALRBIE | RTC_CR_ALRAE | RTC_CR_ALRBE); | |
103 | + | |
104 | + /* Enter initialization mode.*/ | |
105 | + RTC->ICSR |= RTC_ICSR_INIT; | |
106 | + while ((RTC->ICSR & RTC_ICSR_INITF) == 0) { | |
107 | + /* Waint for init flag.*/ | |
108 | + } | |
109 | + | |
110 | + /* Activate free running Binary mode.*/ | |
111 | + RTC->ICSR |= RTC_ICSR_BIN_0; | |
112 | + /* */ | |
113 | + RTC->PRER = STM32_ST_RTC_PRER_BITS; | |
114 | + | |
115 | + /* Exit initialization mode.*/ | |
116 | + RTC->ICSR &= ~RTC_ICSR_INIT; | |
117 | + | |
118 | + /* Wait for shadow reg. update.*/ | |
119 | + while ((RTC->ICSR & RTC_ICSR_RSF) == 0U) { | |
120 | + // wait RSF flag | |
121 | + } | |
122 | + | |
123 | + /* Compare all Sub Seconds 32 bits for RTC Alarm A.*/ | |
124 | + RTC->ALRMASSR = (32UL << RTC_ALRMASSR_MASKSS_Pos); | |
125 | + | |
126 | + /* EXTI enable.*/ | |
127 | + extiEnableGroup1(EXTI_MASK1(STM32_RTC_ALARM_EXTI), EXTI_MODE_RISING_EDGE | EXTI_MODE_ACTION_INTERRUPT); | |
128 | + /* IRQ enable.*/ | |
129 | + nvicEnableVector(ST_NUMBER, STM32_ST_IRQ_PRIORITY); | |
130 | + | |
131 | +} | |
132 | + | |
133 | +/** | |
134 | + * @brief IRQ handling code. | |
135 | + */ | |
136 | +void st_lld_serve_interrupt(void) { | |
137 | + | |
138 | + uint32_t isr; | |
139 | + | |
140 | + /* Get and clear the RTC interrupts. */ | |
141 | + isr = RTC->MISR; | |
142 | + RTC->SCR = isr; | |
143 | + | |
144 | + if ((isr & RTC_MISR_ALRAMF) != 0U) { | |
145 | + | |
146 | + /* Disable RTC Alarm A.*/ | |
147 | + RTC->CR &= ~(RTC_CR_ALRAE | RTC_CR_ALRAIE); | |
148 | + | |
149 | + osalSysLockFromISR(); | |
150 | + osalOsTimerHandlerI(); | |
151 | + osalSysUnlockFromISR(); | |
152 | + } | |
153 | + | |
154 | +} | |
155 | + | |
156 | +/** @} */ |
@@ -0,0 +1,214 @@ | ||
1 | +/* | |
2 | + ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio | |
3 | + | |
4 | + Licensed under the Apache License, Version 2.0 (the "License"); | |
5 | + you may not use this file except in compliance with the License. | |
6 | + You may obtain a copy of the License at | |
7 | + | |
8 | + http://www.apache.org/licenses/LICENSE-2.0 | |
9 | + | |
10 | + Unless required by applicable law or agreed to in writing, software | |
11 | + distributed under the License is distributed on an "AS IS" BASIS, | |
12 | + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |
13 | + See the License for the specific language governing permissions and | |
14 | + limitations under the License. | |
15 | +*/ | |
16 | + | |
17 | +/** | |
18 | + * @file SYSTICKv2/hal_st_lld.h | |
19 | + * @brief RTC V3 based ST Driver subsystem low level driver header. | |
20 | + * | |
21 | + * @addtogroup ST | |
22 | + * @{ | |
23 | + */ | |
24 | + | |
25 | +#ifndef HAL_RTC_ST_LLD_H | |
26 | +#define HAL_RTC_ST_LLD_H | |
27 | + | |
28 | +/*===========================================================================*/ | |
29 | +/* Driver constants. */ | |
30 | +/*===========================================================================*/ | |
31 | + | |
32 | +/** | |
33 | + * @brief RTC SSR registry initial value. | |
34 | + */ | |
35 | +#define STM32_RTC_SSR_INIT_VALUE 0xFFFFFFFFUL | |
36 | + | |
37 | +/*===========================================================================*/ | |
38 | +/* Driver pre-compile time settings. */ | |
39 | +/*===========================================================================*/ | |
40 | + | |
41 | +/** | |
42 | + * @brief SysTick timer IRQ priority. | |
43 | + */ | |
44 | +#if !defined(STM32_ST_IRQ_PRIORITY) || defined(__DOXYGEN__) | |
45 | +#define STM32_ST_IRQ_PRIORITY 8 | |
46 | +#endif | |
47 | + | |
48 | +/** | |
49 | + * @brief RTC binary mode attribute default value. | |
50 | + */ | |
51 | +#if !defined(STM32_RTC_HAS_BINARY_MODE) || defined(__DOXYGEN__) | |
52 | +#define STM32_RTC_HAS_BINARY_MODE FALSE | |
53 | +#endif | |
54 | + | |
55 | +/** | |
56 | + * @brief RTC mixed mode attribute default value. | |
57 | + */ | |
58 | +#if !defined(STM32_RTC_HAS_MIXED_MODE) || defined(__DOXYGEN__) | |
59 | +#define STM32_RTC_HAS_MIXED_MODE FALSE | |
60 | +#endif | |
61 | + | |
62 | +/*===========================================================================*/ | |
63 | +/* Derived constants and error checks. */ | |
64 | +/*===========================================================================*/ | |
65 | + | |
66 | +#if OSAL_ST_MODE != OSAL_ST_MODE_FREERUNNING | |
67 | +#error "ST based on RTC supports only free running mode. Change CH_CFG_ST_TIMEDELTA to enable tick-less mode." | |
68 | +#endif | |
69 | + | |
70 | +#if STM32_HAS_RTC == FALSE | |
71 | +#error "RTC not present in the selected device" | |
72 | +#endif | |
73 | + | |
74 | +#if HAL_USE_RTC == TRUE | |
75 | +#error "ST requires RTC but it is already used" | |
76 | +#endif | |
77 | + | |
78 | +#if STM32_RTC_HAS_BINARY_MODE == FALSE | |
79 | +#error "RTC does not support binary mode" | |
80 | +#endif | |
81 | + | |
82 | + | |
83 | +#if (OSAL_ST_RESOLUTION != 32) | |
84 | +#error "ST based on RTC requires 32bits resolution. Set CH_CFG_ST_RESOLUTION to 32." | |
85 | +#endif | |
86 | + | |
87 | +#if (STM32_RTCCLK % OSAL_ST_FREQUENCY) != 0 | |
88 | +#error "the selected ST frequency is not obtainable because integer rounding" | |
89 | +#endif | |
90 | + | |
91 | +#if (STM32_RTCCLK / OSAL_ST_FREQUENCY) > 128 | |
92 | +#error "the selected ST frequency is not obtainable because RTC Prescaler A limits" | |
93 | +#endif | |
94 | + | |
95 | +/** | |
96 | + * @brief ST Deep Sleep support attrubute. | |
97 | + */ | |
98 | +#define STM32_ST_DEEP_SLEEP_SUPPORT TRUE | |
99 | + | |
100 | +/** | |
101 | + * @brief ST Alarms number. | |
102 | + */ | |
103 | +#define ST_LLD_NUM_ALARMS 1 | |
104 | + | |
105 | +/*===========================================================================*/ | |
106 | +/* Driver data structures and types. */ | |
107 | +/*===========================================================================*/ | |
108 | + | |
109 | +/*===========================================================================*/ | |
110 | +/* Driver macros. */ | |
111 | +/*===========================================================================*/ | |
112 | + | |
113 | +/*===========================================================================*/ | |
114 | +/* External declarations. */ | |
115 | +/*===========================================================================*/ | |
116 | + | |
117 | +#ifdef __cplusplus | |
118 | +extern "C" { | |
119 | +#endif | |
120 | + void st_lld_init(void); | |
121 | + void st_lld_serve_interrupt(void); | |
122 | +#ifdef __cplusplus | |
123 | +} | |
124 | +#endif | |
125 | + | |
126 | +/*===========================================================================*/ | |
127 | +/* Driver inline functions. */ | |
128 | +/*===========================================================================*/ | |
129 | + | |
130 | +/** | |
131 | + * @brief Returns the time counter value. | |
132 | + * | |
133 | + * @return The counter value. | |
134 | + * | |
135 | + * @notapi | |
136 | + */ | |
137 | +static inline systime_t st_lld_get_counter(void) { | |
138 | + | |
139 | + return (systime_t)(STM32_RTC_SSR_INIT_VALUE - RTC->SSR); | |
140 | +} | |
141 | + | |
142 | +/** | |
143 | + * @brief Starts the alarm. | |
144 | + * @note Makes sure that no spurious alarms are triggered after | |
145 | + * this call. | |
146 | + * | |
147 | + * @param[in] abstime the time to be set for the first alarm | |
148 | + * | |
149 | + * @notapi | |
150 | + */ | |
151 | +static inline void st_lld_start_alarm(systime_t abstime) { | |
152 | + | |
153 | + /* Disable RTC Alarm A.*/ | |
154 | + RTC->CR &= ~(RTC_CR_ALRAE | RTC_CR_ALRAIE); | |
155 | + | |
156 | + /* Set alarm time.*/ | |
157 | + RTC->ALRABINR = (STM32_RTC_SSR_INIT_VALUE - (uint32_t)abstime); | |
158 | + | |
159 | + /* Enabel RTC Alarm A.*/ | |
160 | + RTC->CR |= (RTC_CR_ALRAE | RTC_CR_ALRAIE); | |
161 | +} | |
162 | + | |
163 | +/** | |
164 | + * @brief Sets the alarm time. | |
165 | + * | |
166 | + * @param[in] abstime the time to be set for the next alarm | |
167 | + * | |
168 | + * @notapi | |
169 | + */ | |
170 | +static inline void st_lld_set_alarm(systime_t abstime) { | |
171 | + | |
172 | + st_lld_start_alarm(abstime); | |
173 | +} | |
174 | + | |
175 | + | |
176 | +/** | |
177 | + * @brief Determines if the alarm is active. | |
178 | + * | |
179 | + * @return The alarm status. | |
180 | + * @retval false if the alarm is not active. | |
181 | + * @retval true is the alarm is active | |
182 | + * | |
183 | + * @notapi | |
184 | + */ | |
185 | +static inline bool st_lld_is_alarm_active(void) { | |
186 | + | |
187 | + return (bool)((RTC->CR & RTC_CR_ALRAE) != 0); | |
188 | +} | |
189 | + | |
190 | +/** | |
191 | + * @brief Stops the alarm interrupt. | |
192 | + * | |
193 | + * @notapi | |
194 | + */ | |
195 | +static inline void st_lld_stop_alarm(void) { | |
196 | + | |
197 | + RTC->CR &= ~(RTC_CR_ALRAE | RTC_CR_ALRAIE); | |
198 | +} | |
199 | + | |
200 | +/** | |
201 | + * @brief Returns the current alarm time. | |
202 | + * | |
203 | + * @return The currently set alarm time. | |
204 | + * | |
205 | + * @notapi | |
206 | + */ | |
207 | +static inline systime_t st_lld_get_alarm(void) { | |
208 | + | |
209 | + return (systime_t)(STM32_RTC_SSR_INIT_VALUE - RTC->ALRABINR); | |
210 | +} | |
211 | + | |
212 | +#endif /* HAL_RTC_ST_LLD_H */ | |
213 | + | |
214 | +/** @} */ |