(mensagem de log vazia)
@@ -142,7 +142,7 @@ | ||
142 | 142 | * @brief Enables the SERIAL subsystem. |
143 | 143 | */ |
144 | 144 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) |
145 | -#define HAL_USE_SERIAL FALSE | |
145 | +#define HAL_USE_SERIAL TRUE | |
146 | 146 | #endif |
147 | 147 | |
148 | 148 | /** |
@@ -156,7 +156,7 @@ | ||
156 | 156 | * @brief Enables the SIO subsystem. |
157 | 157 | */ |
158 | 158 | #if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) |
159 | -#define HAL_USE_SIO TRUE | |
159 | +#define HAL_USE_SIO FALSE | |
160 | 160 | #endif |
161 | 161 | |
162 | 162 | /** |
@@ -309,7 +309,7 @@ | ||
309 | 309 | #define STM32_SERIAL_USE_USART3 FALSE |
310 | 310 | #define STM32_SERIAL_USE_UART4 FALSE |
311 | 311 | #define STM32_SERIAL_USE_UART5 FALSE |
312 | -#define STM32_SERIAL_USE_LPUART1 FALSE | |
312 | +#define STM32_SERIAL_USE_LPUART1 TRUE | |
313 | 313 | |
314 | 314 | /* |
315 | 315 | * SIO driver system settings. |
@@ -319,7 +319,7 @@ | ||
319 | 319 | #define STM32_SIO_USE_USART3 FALSE |
320 | 320 | #define STM32_SIO_USE_UART4 FALSE |
321 | 321 | #define STM32_SIO_USE_UART5 FALSE |
322 | -#define STM32_SIO_USE_LPUART1 TRUE | |
322 | +#define STM32_SIO_USE_LPUART1 FALSE | |
323 | 323 | |
324 | 324 | /* |
325 | 325 | * SPI driver system settings. |
@@ -33,21 +33,21 @@ | ||
33 | 33 | .code_region = 0U, |
34 | 34 | .data_region = 1U, |
35 | 35 | .regions = { |
36 | - { | |
36 | + [0] = { | |
37 | 37 | (uint32_t)&__flash1_base__, (uint32_t)&__flash1_end__, false |
38 | 38 | }, |
39 | - { | |
39 | + [1] = { | |
40 | 40 | (uint32_t)&__ram1_base__, (uint32_t)&__ram1_end__, true |
41 | 41 | } |
42 | 42 | }, |
43 | 43 | .mpuregs = { |
44 | - { | |
44 | + [0] = { | |
45 | 45 | (uint32_t)&__flash1_base__, MPU_RASR_ATTR_AP_RO_RO | |
46 | 46 | MPU_RASR_ATTR_CACHEABLE_WT_NWA | |
47 | 47 | MPU_RASR_SIZE_32K | |
48 | 48 | MPU_RASR_ENABLE |
49 | 49 | }, |
50 | - { | |
50 | + [1] = { | |
51 | 51 | (uint32_t)&__ram1_base__, MPU_RASR_ATTR_AP_RW_RW | |
52 | 52 | MPU_RASR_ATTR_CACHEABLE_WB_WA | |
53 | 53 | MPU_RASR_SIZE_4K | |
@@ -54,9 +54,9 @@ | ||
54 | 54 | MPU_RASR_ENABLE |
55 | 55 | } |
56 | 56 | }, |
57 | - .stdin_stream = (SandboxStream *)&LPSIOD1, | |
58 | - .stdout_stream = (SandboxStream *)&LPSIOD1, | |
59 | - .stderr_stream = (SandboxStream *)&LPSIOD1 | |
57 | + .stdin_stream = (SandboxStream *)&LPSD1, | |
58 | + .stdout_stream = (SandboxStream *)&LPSD1, | |
59 | + .stderr_stream = (SandboxStream *)&LPSD1 | |
60 | 60 | }; |
61 | 61 | |
62 | 62 | /* Sandbox 2 configuration.*/ |
@@ -64,21 +64,21 @@ | ||
64 | 64 | .code_region = 0U, |
65 | 65 | .data_region = 1U, |
66 | 66 | .regions = { |
67 | - { | |
67 | + [0] = { | |
68 | 68 | (uint32_t)&__flash2_base__, (uint32_t)&__flash2_end__, false |
69 | 69 | }, |
70 | - { | |
70 | + [1] = { | |
71 | 71 | (uint32_t)&__ram2_base__, (uint32_t)&__ram2_end__, true |
72 | 72 | } |
73 | 73 | }, |
74 | 74 | .mpuregs = { |
75 | - { | |
75 | + [0] = { | |
76 | 76 | (uint32_t)&__flash2_base__, MPU_RASR_ATTR_AP_RO_RO | |
77 | 77 | MPU_RASR_ATTR_CACHEABLE_WT_NWA | |
78 | 78 | MPU_RASR_SIZE_32K | |
79 | 79 | MPU_RASR_ENABLE |
80 | 80 | }, |
81 | - { | |
81 | + [1] = { | |
82 | 82 | (uint32_t)&__ram2_base__, MPU_RASR_ATTR_AP_RW_RW | |
83 | 83 | MPU_RASR_ATTR_CACHEABLE_WB_WA | |
84 | 84 | MPU_RASR_SIZE_4K | |
@@ -85,9 +85,9 @@ | ||
85 | 85 | MPU_RASR_ENABLE |
86 | 86 | } |
87 | 87 | }, |
88 | - .stdin_stream = (SandboxStream *)&LPSIOD1, | |
89 | - .stdout_stream = (SandboxStream *)&LPSIOD1, | |
90 | - .stderr_stream = (SandboxStream *)&LPSIOD1 | |
88 | + .stdin_stream = (SandboxStream *)&LPSD1, | |
89 | + .stdout_stream = (SandboxStream *)&LPSD1, | |
90 | + .stderr_stream = (SandboxStream *)&LPSD1 | |
91 | 91 | }; |
92 | 92 | |
93 | 93 | /* Sandbox objects.*/ |
@@ -142,10 +142,9 @@ | ||
142 | 142 | chEvtRegister(&sb.termination_es, &el1, (eventid_t)0); |
143 | 143 | |
144 | 144 | /* |
145 | - * Activates the Serial or SIO driver using the default configuration. | |
145 | + * Activates the Serial driver using the default configuration. | |
146 | 146 | */ |
147 | - sioStart(&LPSIOD1, NULL); | |
148 | - sioStartOperation(&LPSIOD1, NULL); | |
147 | + sdStart(&LPSD1, NULL); | |
149 | 148 | |
150 | 149 | /* |
151 | 150 | * Creates the blinker thread. |
@@ -176,8 +175,8 @@ | ||
176 | 175 | |
177 | 176 | /* Checking for user button, launching test suite if pressed.*/ |
178 | 177 | if (palReadLine(LINE_BUTTON)) { |
179 | - test_execute((BaseSequentialStream *)&LPSIOD1, &rt_test_suite); | |
180 | - test_execute((BaseSequentialStream *)&LPSIOD1, &oslib_test_suite); | |
178 | + test_execute((BaseSequentialStream *)&LPSD1, &rt_test_suite); | |
179 | + test_execute((BaseSequentialStream *)&LPSD1, &oslib_test_suite); | |
181 | 180 | } |
182 | 181 | |
183 | 182 | /* Waiting for a sandbox event or timeout.*/ |
@@ -184,11 +183,11 @@ | ||
184 | 183 | if (chEvtWaitOneTimeout(ALL_EVENTS, TIME_MS2I(500)) != (eventmask_t)0) { |
185 | 184 | |
186 | 185 | if (chThdTerminatedX(utp1)) { |
187 | - chprintf((BaseSequentialStream *)&LPSIOD1, "SB1 terminated\r\n"); | |
186 | + chprintf((BaseSequentialStream *)&LPSD1, "SB1 terminated\r\n"); | |
188 | 187 | } |
189 | 188 | |
190 | 189 | if (chThdTerminatedX(utp2)) { |
191 | - chprintf((BaseSequentialStream *)&LPSIOD1, "SB2 terminated\r\n"); | |
190 | + chprintf((BaseSequentialStream *)&LPSD1, "SB2 terminated\r\n"); | |
192 | 191 | } |
193 | 192 | } |
194 | 193 | } |
@@ -142,7 +142,7 @@ | ||
142 | 142 | * @brief Enables the SERIAL subsystem. |
143 | 143 | */ |
144 | 144 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) |
145 | -#define HAL_USE_SERIAL FALSE | |
145 | +#define HAL_USE_SERIAL TRUE | |
146 | 146 | #endif |
147 | 147 | |
148 | 148 | /** |
@@ -156,7 +156,7 @@ | ||
156 | 156 | * @brief Enables the SIO subsystem. |
157 | 157 | */ |
158 | 158 | #if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) |
159 | -#define HAL_USE_SIO TRUE | |
159 | +#define HAL_USE_SIO FALSE | |
160 | 160 | #endif |
161 | 161 | |
162 | 162 | /** |
@@ -309,7 +309,7 @@ | ||
309 | 309 | #define STM32_SERIAL_USE_USART3 FALSE |
310 | 310 | #define STM32_SERIAL_USE_UART4 FALSE |
311 | 311 | #define STM32_SERIAL_USE_UART5 FALSE |
312 | -#define STM32_SERIAL_USE_LPUART1 FALSE | |
312 | +#define STM32_SERIAL_USE_LPUART1 TRUE | |
313 | 313 | |
314 | 314 | /* |
315 | 315 | * SIO driver system settings. |
@@ -319,7 +319,7 @@ | ||
319 | 319 | #define STM32_SIO_USE_USART3 FALSE |
320 | 320 | #define STM32_SIO_USE_UART4 FALSE |
321 | 321 | #define STM32_SIO_USE_UART5 FALSE |
322 | -#define STM32_SIO_USE_LPUART1 TRUE | |
322 | +#define STM32_SIO_USE_LPUART1 FALSE | |
323 | 323 | |
324 | 324 | /* |
325 | 325 | * SPI driver system settings. |
@@ -33,12 +33,16 @@ | ||
33 | 33 | .code_region = 0U, |
34 | 34 | .data_region = 1U, |
35 | 35 | .regions = { |
36 | - {(uint32_t)&__flash1_base__, (uint32_t)&__flash1_end__, false}, | |
37 | - {(uint32_t)&__ram1_base__, (uint32_t)&__ram1_end__, true} | |
36 | + [0] = { | |
37 | + (uint32_t)&__flash1_base__, (uint32_t)&__flash1_end__, false | |
38 | + }, | |
39 | + [1] = { | |
40 | + (uint32_t)&__ram1_base__, (uint32_t)&__ram1_end__, true | |
41 | + } | |
38 | 42 | }, |
39 | - .stdin_stream = (SandboxStream *)&LPSIOD1, | |
40 | - .stdout_stream = (SandboxStream *)&LPSIOD1, | |
41 | - .stderr_stream = (SandboxStream *)&LPSIOD1 | |
43 | + .stdin_stream = (SandboxStream *)&LPSD1, | |
44 | + .stdout_stream = (SandboxStream *)&LPSD1, | |
45 | + .stderr_stream = (SandboxStream *)&LPSD1 | |
42 | 46 | }; |
43 | 47 | |
44 | 48 | /* Sandbox 2 configuration.*/ |
@@ -46,12 +50,16 @@ | ||
46 | 50 | .code_region = 0U, |
47 | 51 | .data_region = 1U, |
48 | 52 | .regions = { |
49 | - {(uint32_t)&__flash2_base__, (uint32_t)&__flash2_end__, false}, | |
50 | - {(uint32_t)&__ram2_base__, (uint32_t)&__ram2_end__, true} | |
53 | + [0] = { | |
54 | + (uint32_t)&__flash2_base__, (uint32_t)&__flash2_end__, false | |
55 | + }, | |
56 | + [1] = { | |
57 | + (uint32_t)&__ram2_base__, (uint32_t)&__ram2_end__, true | |
58 | + } | |
51 | 59 | }, |
52 | - .stdin_stream = (SandboxStream *)&LPSIOD1, | |
53 | - .stdout_stream = (SandboxStream *)&LPSIOD1, | |
54 | - .stderr_stream = (SandboxStream *)&LPSIOD1 | |
60 | + .stdin_stream = (SandboxStream *)&LPSD1, | |
61 | + .stdout_stream = (SandboxStream *)&LPSD1, | |
62 | + .stderr_stream = (SandboxStream *)&LPSD1 | |
55 | 63 | }; |
56 | 64 | |
57 | 65 | /* Sandbox objects.*/ |
@@ -106,10 +114,9 @@ | ||
106 | 114 | chEvtRegister(&sb.termination_es, &el1, (eventid_t)0); |
107 | 115 | |
108 | 116 | /* |
109 | - * Activates the Serial or SIO driver using the default configuration. | |
117 | + * Activates the Serial driver using the default configuration. | |
110 | 118 | */ |
111 | - sioStart(&LPSIOD1, NULL); | |
112 | - sioStartOperation(&LPSIOD1, NULL); | |
119 | + sdStart(&LPSD1, NULL); | |
113 | 120 | |
114 | 121 | /* |
115 | 122 | * Creates the blinker thread. |
@@ -158,8 +165,8 @@ | ||
158 | 165 | |
159 | 166 | /* Checking for user button, launching test suite if pressed.*/ |
160 | 167 | if (palReadLine(LINE_BUTTON)) { |
161 | - test_execute((BaseSequentialStream *)&LPSIOD1, &rt_test_suite); | |
162 | - test_execute((BaseSequentialStream *)&LPSIOD1, &oslib_test_suite); | |
168 | + test_execute((BaseSequentialStream *)&LPSD1, &rt_test_suite); | |
169 | + test_execute((BaseSequentialStream *)&LPSD1, &oslib_test_suite); | |
163 | 170 | } |
164 | 171 | |
165 | 172 | /* Waiting for a sandbox event or timeout.*/ |
@@ -166,11 +173,11 @@ | ||
166 | 173 | if (chEvtWaitOneTimeout(ALL_EVENTS, TIME_MS2I(500)) != (eventmask_t)0) { |
167 | 174 | |
168 | 175 | if (chThdTerminatedX(utp1)) { |
169 | - chprintf((BaseSequentialStream *)&LPSIOD1, "SB1 terminated\r\n"); | |
176 | + chprintf((BaseSequentialStream *)&LPSD1, "SB1 terminated\r\n"); | |
170 | 177 | } |
171 | 178 | |
172 | 179 | if (chThdTerminatedX(utp2)) { |
173 | - chprintf((BaseSequentialStream *)&LPSIOD1, "SB2 terminated\r\n"); | |
180 | + chprintf((BaseSequentialStream *)&LPSD1, "SB2 terminated\r\n"); | |
174 | 181 | } |
175 | 182 | } |
176 | 183 | } |
@@ -111,9 +111,7 @@ | ||
111 | 111 | /** |
112 | 112 | * @brief MPU regions initialization values. |
113 | 113 | * @note Regions initialization values must be chosen to be |
114 | - * functionally equivalent to the values in the "regions" | |
115 | - * field. | |
116 | - * | |
114 | + * consistent with the values in the "regions" field. | |
117 | 115 | */ |
118 | 116 | mpureg_t mpuregs[SB_NUM_REGIONS]; |
119 | 117 | #endif |