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File Information

File Size
2,961,186 bytes
MD5
3181a9f973d79fbc02d670d880311a26

Projeto Descrição

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.