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Projeto Descrição

By simulator + Tcl + C language, let's verify ASIC and FPGA effectively!

(simulator <= DPI-C => C++, simulator <= named pipes => C++ are under development, too.)

NOODLYBOX is a mimic processor for verification.

It can manipulate FPGA model which is connected to microcomputer's local bus.


  1. A microcomputer and FPGA are mounted on a printed circuit board.
  2. A microcomputer and the connection form between FPGA are SRAM interface.
  3. FPGA is modeled by VHDL or Verilog.
  4. ModelSim, ISE Simulator, or Icarus Verilog are installed.

When all the conditions mentioned above are met, NOODLBOX can act as the substitute of the microcomputer on an HDL simulator.

System Requirements

System requirement is not defined

Liberado: 2009-10-25 02:37
noodlybox 0009 (1 files Esconder)

Release Notes

Repositoryのtrunk rev113に相当します。

TclでもDPI-Cでもなく、名前付きパイプを使ってHDLとC言語とのやりとりをするサンプル pipesample を追加しました。
Verilog HDL側はVerilog2001のファイル系システムタスク($fopen, $fread等)のみを使用しているので、より多くのHDLシミュレータで動かせる可能性があります。


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