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Projeto Descrição

By simulator + Tcl + C language, let's verify ASIC and FPGA effectively!

(simulator <= DPI-C => C++, simulator <= named pipes => C++ are under development, too.)

NOODLYBOX is a mimic processor for verification.

It can manipulate FPGA model which is connected to microcomputer's local bus.


  1. A microcomputer and FPGA are mounted on a printed circuit board.
  2. A microcomputer and the connection form between FPGA are SRAM interface.
  3. FPGA is modeled by VHDL or Verilog.
  4. ModelSim, ISE Simulator, or Icarus Verilog are installed.

When all the conditions mentioned above are met, NOODLBOX can act as the substitute of the microcomputer on an HDL simulator.

System Requirements

System requirement is not defined

Liberado: 2012-03-11 22:19
nbox_util r247 (1 files Esconder)

Release Notes


ModelSIM, ISE Simulator, Active-HDLで動作が確認できています。


source nbox_util.tcl

  • gather_wave
    • インスタンスごとにグループ化しつつ信号を波形ウィンドウに追加します。
  • dump_pblaz (ISE Simulator専用)
    • PicoBlaze3のレジスタ、フラグ、ScratchPadMemoryを波形ウィンドウに追加します。

詳細説明は をご覧ください。